Method of loading instructions into an instruction cache by repe

Details Method of loading instructions into an instruction cache by repe Method of loading instructions into an instruction cache by repe

1994-11-25

1997-06-24

Kim, Kenneth S.

395403, 39542103, 395460, 395584, G06F 1206

Patent

active

056424930

ABSTRACT:
A method of loading a particular block of instructions into the instruction cache (14) of a Harvard architecture data processor (10) involves repetitively mis-predicting a branch instruction in a loop. The branch instruction is conditioned upon an instruction whose execution is contrived to output a sequential fetch address. However, the instruction's result is not available until after the branch instruction begins executing. Therefore, the data processor speculatively executes or predicts the branch instruction. In this case, the branch instruction predicts that it will branch to the particular block of instructions. The data processor then loads the instructions into its instruction cache. Later, the data processor determines that it mis-predicted the branch instruction, returning to the loop for another iteration.

REFERENCES:
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patent: 5381533 (1995-01-01), Peleg et al.
patent: 5421020 (1995-05-01), Levitan
patent: 5454117 (1995-09-01), Puziol et al.
patent: 5487156 (1996-01-01), Popescu et al.
patent: 5511172 (1996-04-01), Kimura et al.

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