Registers – Systems controlled by data bearing records – Time analysis
Patent
1976-06-30
1978-02-21
Malzahn, David H.
Registers
Systems controlled by data bearing records
Time analysis
324 73AT, G06F 1100
Patent
active
040748510
ABSTRACT:
Level sensitive testing is performed on a generalized and modular logic with embedded array system that is utilized as an arithmetic/logical unit in a digital computer. Each arithmetic/logical unit of a computer is formed of arrangements of combinational logic networks, arrays and storage circuitry. The storage circuitry has the capability for performing scan-in/scan-out operations independently of the system input/output and controls. Using the scan capability, the method of the invention provides for the state of the storage circuitry to be preconditioned and independent of its prior history. Test patterns from an automatic test generator are cycled through the networks of combinational logic and arrays and their respective associated storage circuitry for removal through the scan arrangement to determine their fault status.
REFERENCES:
patent: 3633016 (1972-01-01), Walker et al.
patent: 3761695 (1973-09-01), Eichelberger
patent: 3916306 (1975-10-01), Patti
P. V. Jordon, "Integrated Circuit Testing" IBM Tech. Disclosure Bulletin, vol. 13, No. 5 Oct. 1970, pp. 1093-1094.
P. Goel et al., "Testing of Random Logic" IBM Tech. Disclosure Bulletin, vol. 16, No. 2, July 1973, pp. 429-430.
Eichelberger Edward Baxter
Muehldorf Eugen Igor
Walther Ronald Gene
Williams Thomas Walter
DeBruin Wesley
International Business Machines - Corporation
Malzahn David H.
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