Method of irreversibly locking a portion of a semiconductor devi

Details Method of irreversibly locking a portion of a semiconductor devi Method of irreversibly locking a portion of a semiconductor devi

1995-06-06

1997-09-09

Tsai, Jey

Semiconductor device manufacturing: process

Direct application of electrical current

To alter conductivity of fuse or antifuse element

438468, H01L 2170, H01L 2700

Patent

active

056656270

ABSTRACT:
A fuse for an integrated circuit is constituted by a shallow NP junction, covered with a metal contact, the semiconductor region being not excessively doped. For the blowing of the fuse, the junction is forward biased with a current sufficient to enable a diffusion of metal up to the junction. This short-circuits the junction. The detection is done also by the forward biasing of the junction, but with a low current or a low voltage. The detection can also be done with reverse biasing.

REFERENCES:
patent: 4935645 (1990-06-01), Lee
patent: 5008855 (1991-04-01), Eltoukhy et al.
patent: 5298784 (1994-03-01), Gambino et al.
Patent Abstracts of Japan, vol. 12, No. 265 (E-637) JP-A-63048837 Jul. 23, 1988.
Patent Abstracts of Japan, vol. 12, No. 265 (E-637) JP-A-63048838 Jul. 23, 1988.

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