Method of invoking a power-down mode on an integrated circuit by

Details Method of invoking a power-down mode on an integrated circuit by Method of invoking a power-down mode on an integrated circuit by

1998-03-13

2000-11-14

Zweizig, Jeffrey

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327 18, H03L 700

Patent

active

061475289

ABSTRACT:
An integrated circuit comprises means responsive to a normally changing signal at an input of the integrated circuit to implement a primary function of the circuit, and means for monitoring this normally changing signal at the input in question of the integrated circuit. This monitoring means is responsive to suspension of the normally changing signal to communicate a signal for implementation of a secondary function of the circuit. In an exemplary embodiment, the invention is directed towards implementation of power-down of the circuit, without using an explicit power-down or reset pin. An input signal which normally changes at minimum rate, e.g. preferably a clock signal, is held in a fixed state for a minimum duration to invoke the reset or power-down mode. An integrated circuit may thus be powered-down or reset where no explicit power-down or reset pin is available.

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"Complete SO-8, 12-Bit, 400ksps ADC with Shutdown", (LTC 1400), Linear Technology, May 1996.
"Single/Dual, +3V/+5V Dual-Speed Comparators with Auto-Standby", (MAX975/MAX977), Maxim, Sept., 1996.
"+3.OV to +5.5V, 1 uA, up to 250kbps, True RS-232 Transceiver with AutoShutdown Plus", (MAX3238), Maxim, Sept., 1996.

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