Method of interconnecting an embedded integrated circuit

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Including adhesive bonding step

Reexamination Certificate

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Details

C438S107000, C438S126000

Reexamination Certificate

active

06309912

ABSTRACT:

TECHNICAL FIELD
This invention relates in general to a method of electrically interconnecting integrated circuits, and more specifically, to a method of making connections to integrated circuits embedded in a substrate.
BACKGROUND
The traditional method of electrically interconnecting an integrated circuit (IC) die to a substrate is to: (1) make a package, such as a ball grid array (BGA), (2) mechanically attach the IC to the package, (3) interconnect the IC to the package by ultrasonically welding very thin wires from pads on the die to the package, (4) seal the package to environmentally protect the IC, (5) solder the package to the desired motherboard or substrate, such as a ceramic circuit, multichip module, or circuit board. Alternatively, one can attach the IC directly to the substrate by turning it upside down and attaching it directly to the substrate, or to an interposer. This well known method is commonly referred to as ‘flip chip’. When using flip chip or ball grid array (BGA) methods, there is no ability to visually inspect the connections, because the connections are underneath the IC. Visual inspection of the interconnections is an important consideration in high density, high reliability manufacturing processes. Additionally, it is difficult to adequately remove the heat generated by the IC in the inverted flip-chip structure. It would be a valuable addition to the art if there were a method to interconnect an IC to a substrate that allowed visual inspection of the connections, provided for adequate thermal management of the IC, and could add the IC without adding any additional size due to a package or interposer.


REFERENCES:
patent: 4835847 (1989-06-01), Kamperman
patent: 5032896 (1991-07-01), Little et al.
patent: 5990553 (1999-11-01), Morita et al.

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