Method of integrating optical devices and electronic devices...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal

Reexamination Certificate

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Details

C438S065000, C438S221000, C438S296000

Reexamination Certificate

active

07067342

ABSTRACT:
A semiconductor structure has a waveguide a transistor on the same integrated circuit. One trench isolation technique is used for defining a transistor region and another is used for optimizing a lateral boundary of the waveguide. Both the waveguide and the transistor have trenches with liners that can be separately optimized. The transistor has a salicide for source/drain contacts. During this process, a salicide block is used over the waveguide to prevent salicide formation in unwanted areas of the waveguide. The depth of the trench for the waveguide can be lower than that of the trench for the transistor isolation. Trench isolation depth can be set by an etch stop region that can be either a thin oxide layer or a buffer layer that is selectively etchable with respect to the top semiconductor layer and that can be used as a seed layer for growing the top semiconductor layer.

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patent: WO03/023476 (2003-03-01), None
Fischer et al., “0.1 dB/cm Waveguide Losses in Single-Mode SOI Rib Waveguides,” IEEE Photonics Technology Letters, vol. 8, No. 5, May 1996, pp. 647-648.

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