Method of integrated circuit assembly

Details Method of integrated circuit assembly Method of integrated circuit assembly

2004-06-01

2008-08-12

Stoner, Kiley (Department: 1793)

Metal fusion bonding

Process

Preplacing solid filler

C228S180220, C228S234100

Reexamination Certificate

active

07410091

ABSTRACT:
A method of integrated circuit assembly before encapsulation including at least one step of soldering, under mechanical pressure, a first element on a second element, including temporarily maintaining a predetermined spacing, at least partially without solder paste, between the surfaces to be assembled of the first and second elements.

REFERENCES:
patent: 3591839 (1971-07-01), Evans et al.
patent: 5251806 (1993-10-01), Agarwala et al.
patent: 5324569 (1994-06-01), Nagesh et al.
patent: 5361973 (1994-11-01), Ishii et al.
patent: 5385290 (1995-01-01), Degani
patent: 5425493 (1995-06-01), Interrante et al.
patent: 5667132 (1997-09-01), Chirovsky et al.
patent: 5807508 (1998-09-01), Kawahara et al.
patent: 5868887 (1999-02-01), Sylvester et al.
patent: 5872400 (1999-02-01), Chapman et al.
patent: 5931371 (1999-08-01), Pao et al.
patent: 6186390 (2001-02-01), Tadauchi et al.
patent: 6189771 (2001-02-01), Maeda et al.
patent: 6247637 (2001-06-01), Farroni
patent: 6337445 (2002-01-01), Abbott et al.
patent: 6386426 (2002-05-01), Tadauchi et al.
patent: 6846375 (2005-01-01), Hayama et al.
patent: 6981317 (2006-01-01), Nishida
patent: 32 08 604 (1983-09-01), None
patent: 2781924 (2000-02-01), None
patent: 408316619 (1996-11-01), None
patent: 409260438 (1997-10-01), None
patent: 410079404 (1998-03-01), None
French Search Report from French Patent Application 98/09946, filed Jul. 30, 1998.
Database WPI, Section EI, Week 8918 Derwent Publications Ltd., London, DB; Class U11, AN 89-132345 XP002098196 & FR 2 620 569 A (Radiotechnique Compelec) Mar. 17, 1989.
Patent Abstracts of Japan vol. 006, No. 151 (E-124), Aug. 11, 1982 & JP 57 072357 A (NEC Corp.), May 6, 1982.

Affiliated with

Also associated with

Rating

Method of integrated circuit assembly does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of integrated circuit assembly, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of integrated circuit assembly will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4018034