Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2006-06-13
2008-11-18
Nguyen, Ha (Department: 2829)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C324S765010, C702S084000
Reexamination Certificate
active
07452733
ABSTRACT:
Semiconductor dice are electrically tested prior to final assembly. Dice failing the test are identified and not packaged. However, “good dice” (i.e., those dice that passed testing) in proximity to the failed dice frequently fail prematurely in the field. Therefore, in one embodiment, a method to identify those dice having a probability for early failure includes identifying a core die and a die cluster, adding the core die and at least one additional die from the die cluster to a weighted character map, and assigning a weighting value to each of the dice added to the weighted character map. At least one tier of buffer dice is then added to the weighted character map adjacent to each die on the weighted character map. Both the dice from the die cluster and the tier of buffer dice are marked, thereby preventing those dice from being packaged and consequently, shipped to customers.
REFERENCES:
patent: 5539752 (1996-07-01), Berezin et al.
patent: 5777901 (1998-07-01), Berezin et al.
patent: 2002/0121915 (2002-09-01), Montull et al.
patent: 2003/0061212 (2003-03-01), Smith et al.
Friedberg Charles B.
Marcus Kristopher R.
Suciu Paul I.
Atmel Corporation
Brown Valerie
Nguyen Ha
Schwegman Lundberg & Woessner, P.A.
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