Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Compound semiconductor
Reexamination Certificate
2001-04-20
2003-03-18
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Compound semiconductor
C438S046000, C438S048000, C148S033400
Reexamination Certificate
active
06534332
ABSTRACT:
BACKGROUND OF THE INVENTION
Recently, there has been enormous interest in growth of Group III nitrides, and particularly gallium nitride (GaN) thin films, Jpn. J. Appl. Phys. Vol. 34 (1995) pp. L 797-L 799. GaN, and related (Aluminum, Indium)N alloys are being utilized for the production of efficient optoelectronic devices, e.g. light emitters and detectors spanning the spectral range of visible to deep ultra-violet (UV). In addition, the direct wide bandgap and the chemical stability of Group III nitrides are very beneficial for high-temperature and high-power operated electronic devices, e.g. hetero-junction bipolar and field effect transistors.
When GaN is directly grown on a sapphire substrate, the growth mode is three-dimensional due to the large lattice mismatch, the chemical dissimilarity, and the thermal expansion difference. The layer contains structural defects such as point defects, misfit dislocations, and stacking faults. These defects degrade the film's structural, morphological, and electronic properties. In order to achieve high quality epitaxial growth, researchers have introduced a thin low-temperature grown AlN or GaN layer serving as a buffer layer. This layer provides nucleation sites for subsequent two-dimensional GaN growth at higher temperatures, see H. Amano, M. Kito, K. Hiramatsu, and I. Akasaki, Jpn. J. Appl. Phys. 28, L2112 (1989) and S. Nakamura, T. Mukai, M. Senoh, and N. Isawa, Jpn. J. Appl. Phys. 31, L139 (1992). Therefore, the control of buffer layer growth is the most important step in the improvement of GaN main layer properties. The effect of buffer layer thickness and growth temperature on GaN main layer properties has been well studied: G. S. Sudhir, Y. Peyrot, J. Krüger, Y. Kim, R. Klockenbrink, C. Kisielowski, M. D. Rubin and E. R. Weber, Mat. Res. Symp. Proc. 482, pp. 525-530 (1998); Y. Kim, R. Klockenbrink, C. Kisielowski, J. Krüger, D. Corlatan, Sudhir G. S., Y. Peyrot, Y. Cho, M. Rubin, and E. R. Weber, Mat. Res. Symp. Proc. 482, pp. 217-222 (1998); J. Krüger, Sudhir G. S., D. Corlatan, Y. Cho, Y. Kim, R. Klockenbrink, S. Rouvimov, Z. Liliental-Weber, C. Kisielowski, M. Rubin and E. R. Weber, Mat. Res. Symp. Proc. 482 pp. 447-452 (1998). Buffer layers for Group-III nitride growth has been discussed in Mohammad et al., “Progress and Prospects of Group-III Nitride Semiconductors”,
Prog. Quant. Electr.
1996, Vol. 20, No. 5/6 pp. 418-419, hereby incorporated by reference in its entirety. Various buffer materials are disclosed
GaN and related alloys are of particular interest for light emitting thin films because of their ability to cover a wide spectral range. Since no crystalline substrate with a lattice parameter close enough to that of GaN is yet available, different growth techniques have been developed in order to limit the defect density. The basic process that made epitaxial growth on sapphire possible, consists of the deposition of a buffer layer at low temperature (LT-BL) before the growth of GaN at high temperature, H. Amano, N. Sawaki, L Akasaki and Y. Toyada., Appl. Phys. Lett. 48, 353 (1986). Major structural imperfections are found in the high temperature layer and the dislocation density is about 10
9
-10
10
dislocations/cm
2
. The most sophisticated process to reduce the density of dislocations is the so-called “lateral epitaxial overgrowth” (LEO) technique, H. Marchand et al., Appl. Phys. Lett. 73, 747 (1998) and Zheleva et al., Appl. Phys. Lett. 71, 247 (1997). It gives the best results to date but it still suffers from the large number of processing steps required. In the ELO process, a dielectric mask is deposited on a first GaN layer. Lithographic techniques are used to open patterns in the mask. Then, growth of GaN is resumed, nucleation of growth occurs in the openings and, with the proper growth conditions, lateral growth above the mask allows the selected epitaxial areas to fully coalesce. Dislocations do propagate through the openings but bend over the mask where the growth is predominantly lateral. A number of devices with improved performance have been produced using the ELO technique.
The use of pendeo-epitaxy has also resulted in production of more efficient performing devices. In pendeo-epitaxy, lateral overgrowth is initiated on etched GaN. Similarly to the standard ELO technique, dislocations propagate above the seed areas but bend over due to lateral growth in the pendeo area.
Another technique, the cantilever method, makes use of a patterned substrate. GaN does not nucleate easily in the etched stripes of the pattern and lateral overgrowth occurs above these grooves. The above references are hereby incorporated by reference in their entirety. In all these LEO techniques, the lowest dislocation density is observed at the top of the GaN layers but these still show the presence of grain boundaries with mixed dislocations that are formed at the meeting front of the two overgrown layers to compensate a misorientation, Liliental-Weber, et al., MRS Internet J. Nitride Semicond. Res. 4SI, G4.6 (1999). Another approach is to grow intermediate-Low temperature (LT) layers. This method has been introduced by Iwaya et al., Iwaya, et al. Jpn. J. Appl. Phys. 37, L316 (1998), and proved to be efficient. Thus, the process is long and expensive. However, several interlayers are required in order to reach dislocation density as low as 10
8
/cm
2
. The low temperature layers, which are either GaN or AlGaN, introduce excessive stress and after a few such layers the material cracks.
In another study by H. Lahreche et al., Journal of Crystal Growth 205 pp. 245-252 (1999), a silane was used to nucleate an intermediate layer of self-organized islands of a GaN:Si and succeeded in reducing the dislocations density to the 7×10
8
/cm
2
range. However the presence of the strongly n-type dopant silicon might not be always suitable.
The method of the instant invention contemplates a process that reduces the density of threading dislocations by about three orders of magnitude from well above 10
10
/cm
2
down to below 4×10
7
/cm
2
, and the process essentially nearly eliminates the presence of dislocations at the coalescence boundries. This process makes use of a single intermediate temperature interlayer (IT-IL).
BRIEF SUMMARY OF THE INVENTION
This invention contemplates GaN layers grown with only one intermediate-temperature intermediate layer (IT-IL) of GaN. It is preferred that the GaN IT-IL layer be undoped. A dramatic reduction of the dislocation density in GaN was obtained by the growth of a single interlayer grown at an intermediate temperature (IT-IL) after the initial growth at high temperature. This process for growing GaN films results in a reduction in dislocation density over the known prior art. A large percentage of the threading dislocations present in the first GaN epilayer are found to bend near the interlayer and do not propagate into the top layer which grows at higher temperature in a lateral growth mode. Threading dislocations have been found to act as nonradiative centers and scattering centers in electron transport that is detrimental to the performance of light emitting diodes and field effect transistors, Ng et al, J. Electron. Mater. 27, 190 (1998). Efforts around the world are aimed at reducing the density of structural defects in GaN. TEM studies show that the mechanisms of dislocation reduction are similar to those described for the epitaxial lateral overgrowth process, however a notable difference is the absence of coalescence boundaries. The above listed references are hereby incorporated by reference in their entirety.
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Le Dung Anh
Nelms David
Nold Charles R.
The Regents of the University of California
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