Method of growing electrical conductors

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material

Reexamination Certificate

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C438S585000, C438S650000, C438S686000

Reexamination Certificate

active

07067407

ABSTRACT:
A method for forming a conductive thin film includes depositing a metal oxide thin film on a substrate by an atomic layer deposition (ALD) process. The method further includes at least partially reducing the metal oxide thin film by exposing the metal oxide thin film to a gaseous inorganic reducing agent, thereby forming a metal layer. In preferred arrangements, the reducing agent comprises of thermal hydrogen (H2), hydrogen radicals (H*) and/or carbon monoxide (CO).

REFERENCES:
patent: 4058430 (1977-11-01), Suntola et al.
patent: 4477296 (1984-10-01), Nair
patent: 5711811 (1998-01-01), Suntola et al.
patent: 5731634 (1998-03-01), Matsuo et al.
patent: 5865365 (1999-02-01), Nishikawa et al.
patent: 5939334 (1999-08-01), Nguyen et al.
patent: 5989672 (1999-11-01), Hayashi
patent: 6006763 (1999-12-01), Mori et al.
patent: 6033584 (2000-03-01), Ngo et al.
patent: 6066892 (2000-05-01), Ding et al.
patent: 6124189 (2000-09-01), Watanabe et al.
patent: 6130123 (2000-10-01), Liang et al.
patent: 6268291 (2001-07-01), Andricacos et al.
patent: 6303500 (2001-10-01), Jiang et al.
patent: 6323131 (2001-11-01), Obeng et al.
patent: 6342277 (2002-01-01), Sherman
patent: 6346151 (2002-02-01), Jiang et al.
patent: 6433432 (2002-08-01), Shimizu
patent: 6444568 (2002-09-01), Sundararajan et al.
patent: 6464779 (2002-10-01), Powell et al.
patent: 2001/0003064 (2001-06-01), Ohto
patent: 2001/0018266 (2001-08-01), Jiang et al.
patent: 2001/0052318 (2001-12-01), Jiang et al.
patent: 2002/0004293 (2002-01-01), Soininen et al.
patent: 2002/0006711 (2002-01-01), Yamazaki et al.
patent: 2002/0013487 (2002-01-01), Norman et al.
patent: 2002/0027286 (2002-03-01), Sundararajan et al.
patent: 2003/0013302 (2003-01-01), Nguyen et al.
patent: 2003/0135061 (2003-07-01), Norman et al.
patent: 2003/0214043 (2003-11-01), Saitoh et al.
patent: 2004/0087143 (2004-05-01), Norman et al.
patent: 2004/0118697 (2004-06-01), Wen et al.
patent: 0 469 470 (1992-02-01), None
patent: 0 880 168 (1998-11-01), None
patent: WO 93/10652 (1993-05-01), None
Peter Singer, “Progress in Copper: A Look Ahead”, Semiconductor International, May 1, 2002.
Baklanov et al., “Characterization of Cu surface cleaning by hydrogen plasma,”Journal Vac. Sci. Technol, Jul./Aug. 2001, pp. 1201-1211, vol. 19, No. 4.
Baliga, “New designs and materials tackle 1 Gb memory challenge,”Semiconductor International, Nov. 2000.
Basceri, thesis, “Electrical and dielectric properties of (Ba,Sr) TiO3thin film capacitors for ultra-high density dynamic random access memories,” 1997, pp. 13-31, Raleigh, N.C. State University.
Bursky, “Hit up IEDM for gigabit and denser DRAMs and merged logic/memory,”Electronic Design, Dec. 1, 1998.
Campbell et al., “Titanium dioxide (TiO2)-based gate insulators,”IBM J. Res. Develop., May 1999, pp. 383-392, vol. 43, No. 3.
Fukuzumi et al., “Liner-supported cylinder (LSC) technology to realize Ru/Ta2O5/Ru capacitor for future DRAMs,”IEEE, IED 2000, 2000, Session 34.
Hones et al., “MOCVD of thin ruthenium oxide films: Properties and growth kinetics,”Chem. Vap. Deposition, 2000, pp. 193-198, vol. 6, No. 4.
Hu et al., “In siturapid thermal oxidation and reduction of copper thin films and their applications in ultralarge scale integration,”Journal of The Electrochemical Society, 2001, pp. G669-G675, vol. 148, No. 12.
Inoue et al., “Low thermal-budget fabrication of sputtered-PZT capacitor on multilevel interconnects for embedded FeRam,”IEEE, IED 2000, 2000, Session 34.
Jung et al., “A novel Ir/IrO2/Pt-PZT-PT/IrO2/Ir capacitor for a highly reliable mega-scale FRAM,”IEEE, IED 2000, 2000, Session 34.
Kawamoto et al., “The outlook for semiconductor processes and manufacturing technologies in the 0.1-μm age,”Hitachi Review, 1999, pp. 334-339, vol. 48, No. 6.
Onda et al., “Hydrogen plasma cleaning a novel process for IC-packaging,” SEMICON WEST 97, Packaging Materials Conference, 1997, pp. D-1-D-10.
Solanki et al., “Atomic layer deposition of copper seed layers,”Electrochemical and Solic-State Letters, 2000, pp. 479-480, vol. 3, No. 10.
Utriainen et al., “Studies of metallic thin film growth in an atomic layer epitaxy reactor using M(acac)2(M=Ni, Cu, Pt) precursors,”Applied Surface Science, 2000, pp. 151-158, vol. 157.
Utriainen et al., “Studies of NiO thin film formation by atomic layer epitaxy,”Materials Science and Engineering, 1998, pp. 98-103, vol. B54.
Won et al., “Conformal CVD-ruthenium process for MIM capacitor in giga-bit DRAMs,”IEEE, IED 2000, 2000, Session 34.
Xu et al., “A breakthrough in low-k barrier/etch stop films for copper damascene applications,”Semiconductor Fabtech, 2000, pp. 239-244, 11thEdition.
Yagishita et al., “Cleaning of copper surface using vapor-phase organic acids,”MRS Proceedings, MRS Spring 2003 Meeting, Apr. 21-25 2003, Symposium E, Session E3, Paper E3.28.
Yoon et al., “Investigation of RuO2-incorporated Pt layer as a bottom electrode and diffusion barrier for high epsilon capacitor applications,”Electrochemical and Solid-State Letters, 2000, pp. 373-376, vol. 3, No. 8.
Yoon et al., “Tantalum-ruthenium dioxide as a diffusion barrier between Pt bottom electrode and TiSi2ohmic contact layer for high density capacitors,”Journal of Applied Physics, Sep. 1, 1999, pp. 2544-2549, vol. 86, No. 5.
Yoon et al., “Development of an RTA process for the enhanced crystallization of amorphous silicon thin films,”Electrochemical Society Proceedings, 2000, pp. 337-343, vol. 2000-9.
“Current state of leading edge ULSI process technology and future trends,”NEC Device Technology International, 1998, pp. 4-8, No. 48.
“Practical integrated circuit fabrication seminar,” Integrated Circuit Engineering Corporation, 1998.
“SOI technology: IBM's next advance in chip design,” Date unknown.
“Successful development of capacitor technology for next generation memory,” Winbond News Release, Dec. 13, 2000, www.winbond.com.

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