Abrading – Abrading process – Glass or stone abrading
Reexamination Certificate
2002-07-19
2004-03-09
Morgan, Eileen P. (Department: 3723)
Abrading
Abrading process
Glass or stone abrading
C451S063000, C438S692000, C156S345120
Reexamination Certificate
active
06702652
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of grinding the rear side of a semiconductor wafer, on the front side of which bumps are formed.
2. Related Art
Referring to
FIG. 11
, a semiconductor wafer W
1
has ICs, LSIs or other circuits formed on its front side, and a protection tape T
1
is applied to the front side of the semiconductor wafer W
1
. The semiconductor wafer W
1
is put on a chuck table
50
with its front side down, and the semiconductor wafer W
1
is ground to a predetermined thickness by applying the grindstone
51
to its rear side and by rotating the grindstone
51
.
Referring to
FIG. 12
, a semiconductor wafer W
2
has terminals
52
(called “bumps”) formed on its front side. A protection tape T
2
whose adhesive layer is thick enough to bury the bumps
52
, is applied to the front side. Alternatively a protection tape coated with ultraviolet-sensitive glue may be attached to the front side of the semiconductor wafer W
2
, and the tape is exposed to ultraviolet rays prior to the grinding so that the glue may be set. Thus, the stress applied to each bump is reduced in grinding so that the semiconductor wafer W
2
may be prevented from cracking.
In either case the stress applied to the bumps
52
cannot be removed completely, and therefore, the cracking of semiconductor wafers cannot be prevented completely. Also, the necessity of using extra tapes as described above is economically disadvantageous.
It is, therefore, required that the cracking of semiconductor wafers having bumps formed on their front sides be completely prevented in grinding their rear sides without involving extra costs.
SUMMARY OF THE INVENTION
To meet such requirement a method of grinding the rear side of a semiconductor wafer according to the present invention comprises the steps of: preparing semiconductor wafers whose front surfaces have a plurality of circuits formed in lattice patterns; coating the front surface of a selected one of the semiconductor wafers with a resist material to form a resist layer thereon; forming a plurality of holes in the resist layer to extend through the resist layer to the front surface of the semiconductor wafer; forming a plurality of metal bumps to project as bumps from the front surface of the semiconductor wafer such that each of the metal bumps is disposed in one of the holes formed in the resist layer; positioning the semiconductor wafer, which has the metal bumps disposed in the holes of the resist layer, on a chuck table such that the resist layer is supported on the chuck table and the front surface of the semiconductor wafer faces the chuck table; and grinding a rear surface of the semiconductor wafer while the semiconductor wafer is positioned on the chuck table.
The method may further comprise the step of applying a protection tape to the resist layer at the front side of the semiconductor wafer such that, when the semiconductor wafer is positioned on the chuck table, the protection tape is in contact with the chuck table and supports the resist layer and the semiconductor wafer.
The bumps are lower than the thickness of the resist layer, and the bumps may be formed by plating at the holes with gold or a soldering metal, each bump being 50 to 200 &mgr;m in diameter, and 50 to 200 &mgr;m in height.
REFERENCES:
patent: 5260169 (1993-11-01), Nakano
patent: 5434094 (1995-07-01), Kobiki et al.
patent: 6245676 (2001-06-01), Ueno
Disco Corporation
Morgan Eileen P.
Wenderoth , Lind & Ponack, L.L.P.
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