Method of generating test data

Excavating

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371 25, G01R 3128

Patent

active

049032674

ABSTRACT:
The invention prepares test data on a logic LSI which includes a plurality of signal pins, a control pin for inputting an external control signal, and control circuitry responsive to the external control signal for setting the signal pins in a desired state according to a specified function thereof.
In accordance with the invention, the method comprises the steps of storing first data in a first memory, the first data being representative of a specified function of individual pins; storing the second data in a second memory, the second data representing a plurality of pin states corresponding to a plurality of signal states set by the external control signal; reading first and second data from the first and second memory; selectively communicating the test control signal to the integrated circuit, generating third data representative of each pin state of individual pins of each signal state set by the external control signal; and storing the third data into a file as test data.

REFERENCES:
patent: 4450560 (1984-05-01), Conner
patent: 4696005 (1987-09-01), Millham
patent: 4710704 (1987-12-01), Ando
patent: 4710932 (1987-12-01), Hiroshi
patent: 4768195 (1988-08-01), Stoner
patent: 4775977 (1988-10-01), Dehara
patent: 4779273 (1988-10-01), Beacler

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