Method of generating exact-length wires for routing critical sig

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364491, G06F 1750

Patent

active

057846006

ABSTRACT:
Disclosed is an automated method for adjusting wire lengths between connected circuit elements of an integrated circuit. The method includes the following steps: (1) receiving a value specifying a wire length that must be provided between terminals of two integrated circuit elements in the integrated circuit design; (2) defining a routing region in which the wire can be routed; and (3) automatically specifying a wire route including a serpentine section within the routing region for connecting the terminals. The serpentine section will include one or more legs sized to ensure that the wire route has the specified wire length. Specifically disclosed is the application of this method to size wiring between two clock buffers in separate and adjacent stages of a clock distribution network. The two clock buffers may be provided in third and fourth stages of the clock distribution network.

REFERENCES:
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patent: 5394337 (1995-02-01), Shinjo
patent: 5483481 (1996-01-01), Hizume et al.
patent: 5583788 (1996-12-01), Kuribayashi
patent: 5629860 (1997-05-01), Jones et al.
patent: 5644500 (1997-07-01), Miura et al.

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