Method of generating an address signal in a plasma panel and...

Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source

Reexamination Certificate

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Details

C345S212000, C345S213000, C345S060000, C315S169100

Reexamination Certificate

active

07408542

ABSTRACT:
The method of the invention generates an address signal for addressing columns or rows of a PDP. In the case of addressing a column, for example, the method comprises the following steps.For a phase T1, a DC voltage V1is applied across the terminals of a solenoid L, so that the latter stores energy, and applies a voltage A across the terminals of a selected column.During a phase T2, some of the energy stored in the solenoid L is discharged into the column until the voltage across the terminals of the column becomes about zero.During a phase T3, an approximately zero voltage is maintained across the terminals of the column. According to one embodiment the selection of the column(s) during this phase is modifiable.During a phase T4, the solenoid L is charged with current stored in a capacitor until the voltage across the terminals of the column is zero.

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patent: 6366063 (2002-04-01), Sekii
patent: 6943757 (2005-09-01), Huang et al.
patent: 7078866 (2006-07-01), Choi
patent: 7145522 (2006-12-01), Yamamoto et al.
patent: 7166967 (2007-01-01), Cho et al.
patent: WO 99/12149 (1999-03-01), None
patent: WO 03/058591 (2003-07-01), None

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