Fishing – trapping – and vermin destroying
Patent
1995-03-27
1996-09-17
Fourson, George
Fishing, trapping, and vermin destroying
437183, 437184, H01L 2102
Patent
active
055568149
ABSTRACT:
A method for forming wirings of an integrated circuit comprises a step of forming wirings on a substrate, a step of coating the wirings with a thin under metal layer, a step of coating the under metal layer with a mask except a part of the under metal layer, a first etching step of removing the under metal layer which is not coated by the mask to expose upper portions of at least ones of the wirings, an electroplating step of depositing a plating metal layer on the exposed upper portions, a step of removing the mask, and a second etching step of removing all of the remaining under metal layer, whereby said plating metal layer is formed by substantially same material as that of the exposed upper portions or by a material which can be closely contacted with the exposed upper portions and whereby said under metal layer is formed by a material which can be preferentially removed from the exposed upper portions.
REFERENCES:
patent: 5098860 (1992-03-01), Chakravorty et al.
patent: 5148260 (1992-09-01), Inoue et al.
patent: 5202291 (1993-04-01), Charvat et al.
patent: 5340773 (1994-08-01), Yamamoto
patent: 5380679 (1995-01-01), Kano
Inoue Tomotoshi
Yoshimura Misao
Bilodeau Thomas G.
Fourson George
Kabushiki Kaisha Toshiba
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