Method of forming trench isolation structure in an integrated ci

Details Method of forming trench isolation structure in an integrated ci Method of forming trench isolation structure in an integrated ci

1993-09-30

1995-02-07

Thomas, Tom

Fishing, trapping, and vermin destroying

437 42, 148DIG50, H01L 2176, H01L 21302

Patent

active

053875400

ABSTRACT:
The reliability of integrated circuits fabricated with trench isolation is improved by increasing the thickness of the gate dielectric overlying the trench corner. After the trench isolation region (40, 56) has been formed a thin layer of silicon dioxide (44) is chemically vapor deposited over the trench isolation region (44) and the adjacent active region (23). A transistor gate electrode (46) is subsequently formed over the thin layer of silicon dioxide (44). The thin layer of silicon dioxide (44) increases the thickness of the gate dielectric that lies between the transistor gate electrode (46) and the trench corner, and therefore the breakdown voltage of the gate dielectric at the trench corner is increased.

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