Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-08-06
2000-10-17
Wilczewski, Mary
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438435, 438449, 438450, 438451, H01L 2176
Patent
active
061331171
ABSTRACT:
A trench isolation structure for high voltage device is provided including a high voltage well, a low voltage well, and trench oxide. The high voltage well is formed first to be the deep junction isolation of isolation region. Next, the trench oxide isolation is formed overlying the high voltage well. Then, the low voltage well with higher concentration is formed underlying the trench oxide by using high energy implant. The isolation structure is a trench oxide(dielectric isolation)-junction isolation structure.
REFERENCES:
patent: 5686347 (1997-11-01), Yang
patent: 5849625 (1998-12-01), Hsue et al.
patent: 5891776 (1999-04-01), Han et al.
patent: 5904541 (1999-05-01), Rho et al.
Lee Calvin
United Microlelectronics Corp.
Wilczewski Mary
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