Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2007-02-20
2007-02-20
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S066000
Reexamination Certificate
active
11203346
ABSTRACT:
A silicon layer is formed on a substrate, and then the silicon layer is patterned, and source regions, drain regions and connectors, all with the same conductivity, are formed. The source regions are connected with the drain regions electrically by the connectors, and short circuits are thus constructed. Then, subsequent procedures of thin film transistor fabrication are performed in turn. Finally, when the source/drain metal is patterned to form data lines, the connectors are cut off by etching as the source/drain metal is etched.
REFERENCES:
patent: 5504039 (1996-04-01), Grivna
patent: 5999149 (1999-12-01), Lee et al.
patent: 2004/0235227 (2004-11-01), Kawase
Chang Jiun-Jye
Chen Chen-Ming
Chu Fang-Tsun
Glenn Michael A.
Glenn Patent Group
Industrial Technology Research Institute
Pham Long
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