Method of forming termination on chip components

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C438S107000

Reexamination Certificate

active

06541302

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to a method of forming terminations on chip components.
Chip components such as tantalum capacitors require termination caps to be formed on the opposite ends of a chip body. Many methods for applying these termination caps include depositing a conductive material on the capacitor by such methods as sputtering, electroplating etc. When these methods are used, it is desirable to mask or shield the central portion of the body between its opposite ends so that it does not include electrically conductive material thereon.
Therefore, a primary object of the present invention is the provision of an improved method of forming terminations on chip components.
A further object of the present invention is the provision of an improved method wherein a chip component body is masked adjacent its central portion during the application of electrically conductive material to the opposite ends of the chip component body forming termination caps.
A further object of the present invention is the provision of a method which can permit the formation of termination caps on a plurality of chip components at once.
A further object of the present invention is the provision of an improved method for forming termination on chip components which is economical in application, results in durable chip components, and is efficient in its operation.
SUMMARY OF THE INVENTION
The foregoing objects may be achieved by taking a chip component having first and second opposite ends requiring terminations, and a central portion between the first and second ends. The chip is inserted into a cavity in a holding member, the cavity having a depth less than the distance between the first and second opposite ends of the chip component whereby the second end and the central portion are within the cavity and the first end is outside the cavity. A first conductive termination is formed on the exterior surface of the first end while at the same time masking the central portion and the second end are masked within the cavity of the holding member from exposure to the conductive termination. The chip is then removed from the cavity and reinserted into the cavity with the first end and the central portion within the cavity and the second end outside the cavity. Then a second conductive termination is formed on the exterior surface of the second end while at the same time central portion and the first end are masked within the cavity of the holding member from exposure to the conductive termination.
Various methods may be used to form the first and second conductive terminations on the chip component. Among these are sputtering, spraying or painting the conductive material on to the first and second ends, dipping the first and second ends respectively in a fluid of conductive material, and electroplating the conductive material on the first and second ends respectively. Other known processes for applying the conductive material to the outer surface of the first and second ends of the chip component may be used without detracting from the invention.
According to another feature of the invention a flexible plate having a hole extending through the plate may be used. The chip component is inserted into the hole with the first and second ends being exposed outside the opposite ends of the hole and with the central portion within the hole. The conductive material is then formed on the first and second ends of the chip component while at the same time masking the central portion from exposure to the conductive material.
This may be done by forming the conductive material simultaneously on both the first and second ends of the chip component or by first forming the conductive material on the first ends and then in a separate operation forming the conductive material on the second ends.
According to another feature of the invention the method may be performed with plates having a plurality of cavities or holes therein to accommodate a plurality of chip components so that the first and second ends of the chip components can all be covered with conductive material as a batch.


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