Method of forming T-gate structure on microelectronic device sub

Fishing – trapping – and vermin destroying

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437 41, 437 44, 437184, 437203, H01L 21265

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active

051550539

ABSTRACT:
A T-gate structure (28a) is fabricated on a microelectronic device substrate (10) using a trilevel resist system in combination with a two-step reactive ion etching (RIE) technique utilizing an oxygen plasma. The trilevel resist consists of a planarizing resist layer (12), masking layer (14) and imaging resist layer (16), which are formed on the surface (10a) of the substrate (10). A focused ion beam (18) is then used to expose the uppermost imaging layer (16) with an image having a width equal to the desired gate length of the T-gate structure (28a). The imaged area is developed and etched to form an opening (14a,16a) of the same width through the imaging layer (16) and also through the masking layer (14). In the first oxygen RIE step, the planarizing resist layer (12) is etched isotropically through the opening (14a,16a), partially down to the substrate surface (10a) to form a cavity (12a) having a width which is larger than the width of the opening (14a,16a). The second oxygen RIE step is used to etch the planarizing resist layer (12) through the opening (14a,16a) completely down to the substrate surface (10a) to form a notch (12a) underneath the cavity (12a) having a width substantially equal to the width of the opening (14a,16a) and thereby the gate length of the T-gate structure (28a). The imaging layer (16) and masking layer (14) are removed, and metal (28) is evaporated onto the substrate (10) to fill the cavity (12a) and notch (12b) and thereby form the T-gate structure (28a). The first resist layer (12) and overlying metal (28) are lifted off, leaving the T-gate structure (28a) on the surface (10a) of the substrate (10).

REFERENCES:
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patent: 4771017 (1988-09-01), Tobin et al.
patent: 4959326 (1990-09-01), Roman et al.
patent: 4975382 (1990-12-01), Takasugi
patent: 5053348 (1991-10-01), Mishra

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