Method of forming substrate vias in a GaAs wafer

Details Method of forming substrate vias in a GaAs wafer Method of forming substrate vias in a GaAs wafer

1991-12-18

1994-03-08

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437203, 437227, 437184, 437974, H01L 2126

Patent

active

052926869

ABSTRACT:
A method of forming substrate vias in a GaAs wafer begins with a GaAs wafer in which all top side processing steps are complete. The top surface of the GaAs wafer includes top surface via contacts, which are in electrical contact with the bottom surface ground plane once the ground vias are complete. A protective layer is formed on the top surface of the wafer to protect the finished integrated circuitry. A portion of the substrate is removed from the bottom surface to achieve a thin layer of substrate material. The bottom surface of the thinned substrate is metalized with a first metal layer. Laser via holes are drilled into the thinned substrate from the bottom surface of the wafer to within a few microns from the top surface metal via contacts. The laser holes are drilled by emitting a controlled number of single pulses over the selected via location. The substrate vias are subsequently wet etched to remove the remaining substrate thickness and the bottom surface of the wafer and the substrate via holes are metalized with a second metal layer. The second metal layer fills the via holes and establishes electrical contact between the top surface via contacts and the bottom surface ground plane. In a final step, the protective layer is removed from the top surface of the wafer.

REFERENCES:
patent: 4437109 (1984-03-01), Anthony et al.
patent: 4612408 (1986-09-01), Moddel et al.
patent: 4832789 (1989-05-01), Cochran et al.
patent: 4840923 (1989-06-01), Flagello et al.
patent: 4964212 (1990-10-01), Deroux-Dauphin et al.
patent: 4978639 (1990-12-01), Hua et al.
patent: 5075238 (1991-12-01), Solomon
patent: 5166097 (1992-11-01), Tanielian
Laser Drilling of Via Holes in GaAs for RF Wafer Scale Integration; Clarke et al; Westinghouse Science and Technology Center; Proceeding of U.S. Conference on GaAs; 1989.
"New applications of a 30W(MM)ND.sup.+3. YAG Laser: GaAs Via Drilling and ITO Etching"; A. Khachentourians, Proceedings of the 1986 International Symposium on Micrelec. pp. 100-104.

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