Method of forming studs and interconnects in a multi-layered sem

Details Method of forming studs and interconnects in a multi-layered sem Method of forming studs and interconnects in a multi-layered sem

1994-10-14

1996-06-25

Quach, T. N.

Fishing, trapping, and vermin destroying

437192, 437195, H01L 21283

Patent

active

055299539

ABSTRACT:
A method of manufacturing a semiconductor device having a stud and interconnect in a dual damascene structure uses selective deposition. The method includes forming a trench including a first opening portion and a second opening portion in a dielectric layer, forming a first adhesion layer on a surface exposed by the first opening portion, forming a second adhesion layer on a surface exposed by the second opening portion, and selectively depositing a conductive material on the first adhesion layer and the second adhesion layer, wherein growth of the conductive material on the second adhesion layer starts after growth of the conductive material on the first adhesion layer has started. The first and second adhesion layers are of different materials.

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