Semiconductor device manufacturing: process – Semiconductor substrate dicing – With attachment to temporary support or carrier
Reexamination Certificate
2011-06-07
2011-06-07
Landau, Matthew C (Department: 2813)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
With attachment to temporary support or carrier
C438S108000, C438S109000, C257S668000
Reexamination Certificate
active
07955953
ABSTRACT:
A method of packaging semiconductor integrated circuits, including the steps of providing a transfer film and forming a patterned, conductive layer on a surface of the transfer film. A first semiconductor integrated circuit (IC) then is attached to the transfer film, where an active side of the first IC is attached to the transfer film. A second semiconductor IC then is attached to the first IC, where a bottom side of the second IC is attached to a bottom side of the first IC. Die pads on an active surface of the second IC are electrically connected to the conductive layer with wires and then a resin material is provided on one side of the transfer film to encapsulate the first and second ICs, the wires and a portion of the conductive layer. Next the transfer film is removed, which exposes the active side of the first IC and the conductive layer. An electrical distribution layer is formed over the active side of the first IC and the conductive layer and conductive balls are attached to the electrical distribution layer. The conductive balls allow electrical interconnection to the first and second integrated circuits.
REFERENCES:
patent: 5200362 (1993-04-01), Lin et al.
patent: 5900676 (1999-05-01), Kweon et al.
patent: 6287893 (2001-09-01), Elenius et al.
patent: 6700188 (2004-03-01), Lin
patent: 6794273 (2004-09-01), Saito et al.
patent: 6921968 (2005-07-01), Chung
patent: 7109059 (2006-09-01), Wark
patent: 7208335 (2007-04-01), Boon et al.
patent: 7253503 (2007-08-01), Fusaro et al.
patent: 7445959 (2008-11-01), Theuss
patent: 7846775 (2010-12-01), Lee et al.
patent: 2006/0091561 (2006-05-01), Dangelmaier et al.
patent: 2006/0246624 (2006-11-01), Fuergut et al.
patent: 2008/0029865 (2008-02-01), Bauer et al.
patent: 2009/0001603 (2009-01-01), Chang et al.
patent: 2009/0315190 (2009-12-01), Kikuchi et al.
Lo Wai Yew
Yip Heng Keong
Bergere Charles
Freescale Semiconductor Inc.
Landau Matthew C
Mitchell James M
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