Method of forming solder terminals for a pinless ceramic module

Metal fusion bonding – Process – Plural joints

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228207, 228223, 228245, B23K 3100

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active

048302643

ABSTRACT:
Disclosed is a method of forming solder terminals for a pinless module, preferably for a pinless metallized ceramic module. The method is comprised of the following steps: forming a substrate having a pattern of conductors formed onto its top surface and preformed via-holes extending from the top to bottom surface; applying a droplet of flux at at least one of said preformed via-hole openings of the bottom surface of said substrate to fill said via-holes with flux by capillarity and form a glob of flux at the bottom openings; applying a solder preform, i.e. solder balls on each glob of flux to which it will adhere, the volume of the preform being substantially equal to the inner volume of the via hole plus the volume of the bump to be formed; heating to cause solder reflow of the solder preform to fill the via-hole and the inner volume of the eyelet with solder; and, cooling below the melting point of the solder so that the molten solder solidifies to form solder terminals at the via-hole locations while forming solder columns in the via-holes. The resultant pinless metallized ceramic module has connections between the I/O's of the module interfacing with the next level of packaging, (i.e., printed circuit boards), that consist of integral solder terminals. Each integral solder terminal comprises a column in the vias of the metallized ceramic substrate, a mound of solder at the top surface of the substrate and spherical solder bumps on the bottom level for making interconnections with the next level of packaging.

REFERENCES:
patent: 3871015 (1975-03-01), Lin et al.
patent: 4332341 (1982-06-01), Minetti
patent: 4412642 (1983-11-01), Fisher, Jr.
patent: 4462534 (1984-07-01), Bitaillou et al.
patent: 4708281 (1987-11-01), Nelson et al.
E. Stephans, IBM Technical Disclosure Bulletin, vol. 20, No. 10, Mar. 1978, p. 3872, "Pinless Module Connector".
A. Bitaillou et al., "IBM Technical Disclosure Bulletin, vol. 27, for Untinned Substrate Process".

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