Method of forming shallow trench isolation

Details Method of forming shallow trench isolation Method of forming shallow trench isolation

2005-12-29

2008-07-08

Loke, Steven (Department: 2818)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C257SE21243, C257SE21546, C257SE21244, C438S221000, C438S296000, C438S424000, C438S637000, C438S700000, C438S704000, C438S733000

Reexamination Certificate

active

07396737

ABSTRACT:
A method of manufacturing a semiconductor device including forming a pad oxide layer on a semiconductor substrate, forming a spacer oxide layer pattern on sidewalls of the pad oxide layer, and forming a nitride layer on the pad oxide layer. The method further includes forming a groove in the nitride layer by selectively removing the spacer oxide layer pattern, forming a trench in a region where the groove is formed, and filling the trench with a thermal oxide layer so as to form a shallow trench isolation (STI) layer. In the method, the line width of the STI layer depends on the thickness of the spacer oxide layer, and so the STI layer can be formed to a line width W smaller than a design rule.

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