Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-04-05
2000-07-25
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438427, 438435, 438437, 148DIG50, H01L 2176
Patent
active
060936215
ABSTRACT:
A method of fabricating a shallow trench isolation. A pad oxide and a dielectric layer are formed on a substrate. A trench is formed in the substrate penetrating through the pad oxide layer and the dielectric layer. The dielectric layer around the edge of the trench is removed to expose the substrate. The trench is filled to form a T-shaped insulation plug.
REFERENCES:
patent: 5940716 (1999-08-01), Jin et al.
patent: 5960297 (1999-09-01), Saki
patent: 5963819 (1999-10-01), Lan
patent: 5976948 (1999-11-01), Werner et al.
patent: 5981356 (1999-11-01), Hsueh et al.
patent: 5989975 (1999-11-01), Kuo
Dang Trung
Huang Jiawei
Patents J.C.
Vanguard International Semiconductor Corp.
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