Method of forming semiconductor devices using gate insulator...

Semiconductor device manufacturing: process – With measuring or testing

Reexamination Certificate

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Details

C438S197000, C438S275000, C438S117000, C438S438000, C438S945000, C148SDIG001, C257S327000

Reexamination Certificate

active

06228663

ABSTRACT:

FIELD OF THE INVENTION
The present invention is generally directed to the manufacture of semiconductor devices. More particularly, the invention is directed to the manufacture of semiconductor devices in which the drive current strength of the final product can be controlled based on gate insulator thickness and channel length.
BACKGROUND OF THE INVENTION
Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applicabilities and numerous disciplines. An example of such a silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor. The principle elements of a typical MOS semiconductor device are illustrated in FIG.
1
. The device generally includes a gate electrode
101
, which acts as a conductor, to which an input signal typically is applied via a gate terminal (not shown). Heavily doped source region
103
and drain region
105
are formed in a semiconductor substrate
107
, and respectively are connected to source and drain terminals (not shown).
A channel region
109
is formed in the semiconductor substrate
107
beneath the gate electrode
101
and separates the source region
103
and drain region
105
. The channel typically is lightly doped with a dopant of a type opposite to that of the source and drain regions. The gate electrode
101
is physically separated from the semiconductor substrate
107
by a gate insulating layer
111
. Typically, this insulating layer is an oxide layer such as SiO
2
. The insulating layer
111
is provided to prevent current from flowing between the gate electrode
101
and the semiconductor source region
103
, drain region
105
or channel region
109
.
In operation, an output voltage typically is developed between the source and drain terminals. When an input voltage is applied to the gate electrode
101
, a transverse electric field is set up in the channel region
109
. By varying the transverse electric field, it is possible to modulate the conductance of the channel region
109
between the source region
103
and drain region
105
. In this manner, an electric field controls the current flow through the channel region
109
. This type of device commonly is referred to as a MOS field-effect transistor (MOSFET). Semiconductor devices such as the one described are used in large numbers to construct most modern electronic devices. In order to increase the capability of such electronic devices, it is necessary to integrate ever larger numbers of such devices into a single silicon wafer. As the semiconductor devices are scaled down in order to form a larger number of such devices on a given surface area, the structure of the devices and the fabrication techniques used to make the devices must be altered.
One important property of MOS devices is drive current strength. It is particularly important to provide semiconductor devices that exhibit the designed drive current strength and to maintain a substantially constant drive current strength between production lots and within a single production lot.
The drive current strength is proportional to capacitance, which in turn is inversely proportional to the thickness of the gate insulating layer. The drive current strength also is inversely proportional to channel length. As the dimensions of semiconductor devices become smaller and smaller, production variations in gate insulating layer thickness have an increased significance with respect to variation in drive current strength.
SUMMARY OF THE INVENTION
Generally, the present invention relates to a method of producing a semiconductor device with controlled drive current strength. Consistent with the present invention, a semiconductor device is formed by forming a gate insulating layer over a substrate. The thickness of the gate insulating layer is measured and compared to a desired design thickness. A gate electrode is formed over the gate insulating layer. The length of the gate electrode is determined, based on the difference between the measured and designed thickness of the gate insulating layer. Thus, the length of the gate electrode, which determines the channel length for the semiconductor device, can be varied to take into account the variation in gate insulating layer thickness from the desired value. This allows the drive current strength of the final semiconductor device to be controlled. This also permits the reduction of variations in drive current strength within and between lots of the semiconductor devices. Current gate electrode formation techniques are sufficiently precise to permit the gate electrode to be formed in the desired length and remedy any variations in the insulating layer thickness.
The above summary of the present invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description that follow describe the embodiments more particularly.


REFERENCES:
patent: 4957877 (1990-09-01), Tam et al.
patent: 4960675 (1990-10-01), Tsuo et al.
patent: 5663076 (1997-09-01), Rostoker et al.
patent: 5822241 (1998-10-01), Chatterjee et al.
patent: 5943550 (1999-08-01), Fulford, Jr. et al.

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