Method of forming self-registering source, drain, and gate conta

Details Method of forming self-registering source, drain, and gate conta Method of forming self-registering source, drain, and gate conta

1979-11-06

1981-12-15

Weisstuch, Aaron

Metal working

Method of mechanical manufacture

Assembling or joining

357 23, 357 41, 357 59, 427 82, 427 93, H01L 21283

Patent

active

043052002

ABSTRACT:
The present invention provides a silicon gate FET and associated integrated circuit structure in which a second level of polysilicon is selectively oxidized to provide insulating regions where desired. Regions of the polysilicon which were not oxidized are suitably doped to function as electrical interconnects to the source and drain regions in the substrate and to the gate. In the preferred embodiment, a metallic interconnection is made between the gate and drain or source region with the second level of polysilicon.

REFERENCES:
patent: 4080719 (1978-03-01), Wilting
patent: 4136434 (1979-01-01), Thibault et al.
patent: 4181537 (1980-01-01), Ichinohe

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