Method of forming recessed oxide isolation with reduced steepnes

Details Method of forming recessed oxide isolation with reduced steepnes Method of forming recessed oxide isolation with reduced steepnes

1985-09-19

1986-12-23

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29580, H01L 21467, H01L 2176, H01L 2194

Patent

active

046303561

ABSTRACT:
Disclosed is a method of forming in a monocrystalline silicon body an optimum recessed oxide isolation structure with reduced steepness of the bird's neck. Starting from a monocrystalline silicon body, there is formed thereon a layered structure of first silicon dioxide, polycrystalline silicon, second silicon dioxide and silicon nitride, in that order. The layers are patterned to form openings in the structure at the areas where it is desired to form the oxide isolation pattern within the silicon body. The exposed areas of the silicon body are anisotropically reactive ion etched to an initial portion of the desired depth obtaining the corresponding portion of the trench having substantially vertical walls. Then by chemical etching the trench is extended to a final portion of the desired depth obtaining inwardly sloped walls in the final portion. The body is then thermally oxidized until the desired oxide isolation penetrates to the desired depth within the silicon body.

REFERENCES:
patent: 3534234 (1970-10-01), Clevenger
patent: 3900350 (1975-08-01), Appels et al.
patent: 3970486 (1976-07-01), Kooi
patent: 4104086 (1978-08-01), Bondur et al.
patent: 4170500 (1979-10-01), Crossley
patent: 4272308 (1981-06-01), Varshney
patent: 4508757 (1985-04-01), Fabricius et al.
patent: 4516316 (1985-05-01), Haskell
G. Das et al, "Elimination of Reactive Ion Etching Trench-Induced Defects" May 1981 IBM Technical Disclosure Bulletin, vol. 23, No. 12, p. 5344.
C. G. Jambotkar, "Preventing Formation of Polysilicon Rails" May 1983 IBM Technical Disclosure Bulletin, vol. 25, No. 12, pp. 6607-6609.
B. M. Kemlage et al. "Fabrication of Oxide Isolation Using an Oxynitride/Polysilicon Mask" Feb. 1982, IBM Technical Disclosure Bulletin, vol. 24, No. 9, p. 4756.
D. W. Ormond, "Method of Manufacturing Dielectrically Isolated Regions of Silicon Utilizing High Pressure Steam" Jan. 1981 IBM Technical Disclosure Bulletin, vol. 23, No. 8, pp. 3694-3697.
Doo, V. Y., "Method of Making High Density Ink Jet Nozzles" IBM Technical Disclosure Bulletin, vol. 23, No. 7A Dec. 1980, p. 2759.
Rideout et al., "Fabricating Recessed Oxide Isolation Regions in Silicon Substrates", IBM Technical Disclosure Bulletin, vol. 17, No. 3, Aug. 1974, pp. 949-951.

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