Method of forming planar isolation regions

Details Method of forming planar isolation regions Method of forming planar isolation regions

1990-07-27

1992-04-28

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 90, 437233, 437967, 437 89, H01L 2176

Patent

active

051089467

ABSTRACT:
A method of forming planar isolation regions in semiconductor structures includes providing a semiconductor substrate and forming a semiconductor layer thereon. A dielectric layer comprising at least two different dielectric materials is disposed on the semiconductor layer and a trench is etched therethrough and into the semiconductor layer. Dielectric sidewalls are formed in the trench which is then filled by selectively forming depositing polycrystalline silicon therein. The semiconductor material is then at least partially oxidized to form the planar isolation region. The isolation regions disclosed herein may be used for both intradevice and interdevice isolation.

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Furumura et al., Selective Growth of Polysilicon, J. Electrochem. Soc.: Solidstate Science and Technology, v. 133, No. 2 (Feb. 1986), pp. 379-383.

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