Method of forming opening in dielectric layer

Details Method of forming opening in dielectric layer Method of forming opening in dielectric layer

2001-01-17

2004-03-16

Vinh, Lan (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S449000, C438S638000, C438S710000, C438S712000

Reexamination Certificate

active

06706638

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 89116207, filed Aug. 11, 2000.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor manufacturing process. More particularly, the present invention relates to a method of forming opening in a dielectric layer with an ion implantation step.
2. Description of the Related Art
In the fabrication processes for a deep contact window, deep trench and hard mask, it is necessary to remove a thicker portion of the oxide layer by etching. However, a thickness of the photoresist has to be reduced in order to satisfy a resolution requirement in a photolithographic process. So, if a dry etching process is adopted throughout the whole fabrication process, a critical dimension loss usually occurs as a result of photoresist loss when the plasma is used in the dry etching process. Since the photoresist is also etched by the plasma in the dry etching process, an increased etching of the oxide layer means more photoresist is etched, resulting a more significant photoresist loss.
FIG. 1A
is a diagram illustrating a thickness of the photoresist as well as a profile and critical dimension of a photoresist opening prior to etching. An oxide layer
20
is formed on the substrate
10
, followed by forming a photoresist layer
26
on the oxide layer
20
. The photoresist layer is patterned to form a photoresist opening
24
having a straight profile on the oxide layer
20
. During the process for forming a via opening
28
, a relatively thick portion of the oxide layer
20
together with a portion of the photoresist layer
26
are removed in the dry etching process, leading to a loss of photoresist layer
26
. However, such a loss of the photoresist layer
26
produces a tapered profile of the photoresist layer, which further results a rugged edge for the via opening
28
with a slanting profile in the dry etching process. Therefore, the slanting profile contributes a significant loss of the critical diminution for the via opening
28
. This is shown in
FIG. 1B
, which illustrates the result after the dry etching process but before the photoresist is stripped from the oxide layer.
When the loss of the photoresist becomes extremely severe, problems, such as striation can result.
FIG. 2
is a diagram illustrating the striation and loss of critical dimension when a substantial portion of the photoresist layer is removed together with the etching of the thick portion of the oxide layer. A substrate
10
is provided with a doped oxide layer
12
formed thereon. An undoped oxide layer
14
is then formed on the doped oxide layer
12
, while an opening
18
is formed in the doped oxide layer
12
and the undoped oxide layer
14
for exposing the substrate
10
. The opening
18
does not have a straight profile, but rather the opening has a rugged edge, as well as an enlarged bottom of the opening
18
and striations
16
as a result of the critical dimension loss.
In general, during a dry etching step for oxide, an etching rate for the photoresist is about 800 Å/min, while an etching selectivity ratio of the oxide to the photoresist is about 6. If the etching rate of the photoresist can be reduced or the etching is more selected to the oxide than the photoresist during the dry etching process, the loss of the photoresist as described above can be ameliorated. Since the plasma is used in the dry etching process, the etching selectivity ratio of the oxide to the photoresist can not be significantly increased. Therefore, when a thicker portion of the oxide layer is etched, the loss of the photoresist can not be effectively reduced. In order to increase the etching selectivity ratio of the oxide to the photoresist, the dry etching process can be partially substituted with a wet etching step. Generally, when the wet etching step is performed on the oxide layer, the etching rate for the photoresist is about of 10 Å/min, and an etching selectivity ratio of the oxide to the photoresist is as high as 80. Accordingly, chemical wet etching step has been known to have a high etching selectivity ratio of the oxide to the photoresist and to reduce the loss of the photoresist. However, the wet etching step can cause a severe lateral etching which leads to formation of the opening with a slanting profile. Therefore, such method is not applicable to an actual fabrication process.
SUMMARY OF THE INVENTION
The present invention provides a method of forming openings in a dielectric layer with an ion implantation step. The dielectric layer includes at least a dielectric layer, with a top dielectric layer being an undoped dielectric layer. By performing the ion implantation step, it provides a low lateral etching rate and a high etching selectivity ratio of oxide to photoresist in the chemical vapor etching step. With the low etching rate for the photoresist, loss of photoresist during the etching step is minimized and the problems of critical dimension loss and striations are prevented. For that reason, the dry etching process is partially substituted by the chemical vapor etching.
As embodied and broadly described herein, the invention provides a process whereby an undoped dielectric layer is formed on a substrate and a mask is formed on the undoped dielectric layer. The mask has an opening that exposes a part of the undoped dielectric layer. The undoped dielectric layer can be either an oxide layer or a silicon nitride layer, for example. With the mask, an ion implantation step is performed to implant ions into the undoped dielectric layer located below the opening. A doped region is thus formed, wherein the depth of the doped region does not exceed the thickness of the undoped dielectric layer. Still with the mask, a chemical vapor etching procedure is performed to etch the doped region. A dry etching procedure is next performed with the same mask, so that the remaining undoped dielectric layer located below the doped region is etched away, thereby exposing a part of the substrate. Next, the mask is either removed or not removed depending on the manufacturing requirement.
In the above-described procedure, the chemical vapor etching has a greater etching rate for the doped region than that for the undoped region. Thus, the lateral etching rate for the doped region is relatively reduced in the chemical vapor etching step, effectively preventing the lateral etching of the chemical vapor etching. According to the present invention, by performing the ion implantation step, the lateral etching of the chemical vapor etching can be reduced, and a straight profile is obtained through the etching. Moreover, the chemical vapor etching has a low etching rate for the mask and high etching selectivity of the dielectric layer to the mask. Therefore, if the dry etching procedure is partially substituted by the chemical vapor etching, the mask loss during etching is reduced. Furthermore, the problems of critical dimension loss and striation are avoided.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 6140244 (2000-10-01), Violette
patent: 6303447 (2001-10-01), Chhagan et al.
patent: 6326300 (2001-12-01), Liu et al.
patent: 6350679 (2002-02-01), McDaniel et al.

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