Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2000-07-03
2002-12-10
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S240000, C438S785000
Reexamination Certificate
active
06492242
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to methods used to fabricate metal-insulator-metal capacitor structures for semiconductor integrated circuits, and more specifically to a method used to form a high dielectric constant, (high k), metallic oxide layer, for use as a dielectric layer for a capacitor structure.
(2) Description of Prior Art
Metal-Oxide-Metal, (MOM), capacitor structures are commonly used in current analog/RF circuits. The use of an insulator layer, with a high dielectric constant, (high K), would be useful in terms of providing efficient charging for the analog devices. Therefore capacitor dielectric layers, such as silicon nitride, with a dielectric constant of about 7, has been used in place of silicon oxide dielectric layers, featuring a dielectric constant of only about 3.9. For enhanced capacitor performance, metal oxide layers, with dielectric constants even larger than silicon nitride values, are now being considered for use in MOM structures. However to form reliable, (in terms of breakdown strength), metal oxide layers, such as tantalum pentoxide, (Ta
2
O
5
), or aluminum oxide, (Al
2
O
3
), temperatures greater than 400° C., are needed. These elevated temperatures however, can result in degradation to existing interconnect structures, comprised of aluminum based metallurgies. The exposure of these aluminum based structures, to temperatures needed to form the metal oxide layer, can result in pre-melting, or reflowing of these structures.
This invention will describe processes used to form reliable, dense, metal oxide layers, for MOM structures, still however avoiding the exposure of the surrounding interconnect structures, metal structures other than MOM structures, to elevated temperatures. A first iteration will describe local heating of an area of a metal layer, in an oxidizing environment, accomplished via local laser ablation. The laser ablation process results in only surface heating of an underlying metal layer, allowing the desired region of metal to be oxidized, forming the desired metal oxide layer at temperatures greater than temperatures experienced by surrounding metal structures. A second iteration will describe the localized formation of the metal oxide layer, in an oxidizing environment, using energy supplied by either UV or I line exposures. Conventional photolithographic plates are used to allow specific regions of an underlying metal layer to experience the UV or I line exposure. Prior art such as Kang in U.S. Pat. No. 5,834,357, as well as Sun et al, in U.S. Pat. No. 5,930,584, describe processes used to fabricate high K dielectric layers, however these prior arts do not feature the unique processes used in this invention to achieve metal oxide layers, without exposure of surrounding metal structures to the high oxidation temperatures, used to form reliable, dense metal oxide layers, on local regions of a metal layer.
SUMMARY OF THE INVENTION
It is an object of this invention to form a high K dielectric layer, for a metal-oxide-metal, (MOM), capacitor structure, via oxidation procedures, which allows the oxidizing region to experience a higher temperature than the surrounding metal interconnect structures.
It is another object of this invention to form a high K dielectric layer, via a laser ablation procedure, performed to localized regions of an underlying metal layer, in an oxidizing ambient.
It is still another object of this invention to form a high K dielectric layer via exposure of localized regions of an underlying metal layer, to UV or I line energies, in the presence of an oxidizing environment.
In accordance with the present invention a method of fabricating a metal-oxide-metal, (MOM), capacitor structure, featuring a high K dielectric layer, formed from localized heating of an underlying metal layer, is described. A first iteration of the invention initiates with the deposition of an underlying metal layer, for subsequent use as the bottom electrode for the MOM capacitor structure, followed by a laser ablation procedure, resulting in the formation of the desired high K, metal oxide component of the MOM capacitor structure. The laser ablation procedure, performed in an oxidizing environment, allows the laser ablated surface of the underlying metal layer to reach a temperature needed for formation of a dense, metal oxide region, while surrounding metal structures, or metal structures used for non-MOM purposes, do not experience the temperature increase. A second iteration of this invention features the subjection of localized regions of the underlying metal layer, to either UV or I line exposures. A photolithographic plate is used to allow only selective regions of the underlying metal layer to be subjected to the UV or I line exposures, performed in an oxidizing environment, thus resulting in the formation of the desired metal oxide component of the MOM capacitor structure, on an underlying metal electrode structure.
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Ang Ting Cheong
Cha Cher Liang Randall
Loh Wye Boon
Loong Sang Yee
Quek Shyuz Fong
Chartered Semiconductor Manufacturing Ltd.
Pike Rosemary L. S.
Saile George O.
Trinh Michael
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