Method of forming multi-layer interconnection

Fishing – trapping – and vermin destroying

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437228, 437229, H01L 2144

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active

056772432

ABSTRACT:
A method of forming a multi-layer interconnection is provided by which a resist pattern can be precisely formed by maintaining a uniform resist pattern film thickness and such problems as reduced electric resistance of a connecting portion and defective connection between a first interconnection layer and a second interconnection layer will not occur by ensuring a sufficient diameter of a contact hole. The method includes the steps of: removing a portion of an insulating layer having a main surface and covering a first conductive layer to form a hole reaching the first conductive layer in the insulating layer; forming an organic layer at least filling the hole; removing a portion of the insulating layer at a portion at which the insulating layer contacts an organic layer filling the hole; removing the organic layer filling the hole to form a recessed portion continuous to the hole in the insulating layer; and forming a second conductive layer in such a manner that it fills the hole and the recessed portion.

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K. Kikuta et al, Multilevel Planarized-Trench-Aluminum (PTA) Interconnection using Reflow Sputtering and Chemical Mechanical Polishing, ULSI Device Development Laboratories, IEDM 1993, pp. 285-288.
Carter W. Kaanta et al, Dual Damascene: A ULSI wiring Technology, IBM General Technology Division, VMIC Conference, 1991, pp. 114-152.

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