Railways: surface track – Ties – Cross section
Patent
1997-04-17
1999-11-09
Tsai, Jey
Railways: surface track
Ties
Cross section
438649, 438655, 438227, 438232, H01L 218244
Patent
active
059797843
ABSTRACT:
A method of forming local interconnection of a SRAM, including the following steps: First, an NMOS and a PMOS are formed on a P-well and an N-well on a substrate, respectively. An isolation oxide layer is formed and the isolation oxide layer on a node is removed. A thin polysilicon layer is formed and N+ shallow implantation and N+ deep implantation is performed by using a photolithography technique. Also, P+ shallow implantation and P+ deep implantation are performed by using a photolithography technique. After the formation of a low resistance material, the low resistance material and the thin polysilicon layer are together formed.
REFERENCES:
patent: 5341014 (1994-08-01), Fujii et al.
patent: 5635426 (1997-06-01), Hayashi et al.
Liang Kuei-Chang
Yang Yu-Hao
Tsai Jey
Winbond Electronics Corp.
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