Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Groove formation
Reexamination Certificate
2007-04-24
2007-04-24
Brewster, William M. (Department: 2823)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Groove formation
C438S455000, C438S458000, C438S464000, C257SE33012
Reexamination Certificate
active
10529673
ABSTRACT:
A semiconductor component having a light-emitting semiconductor layer or a light-emitting semiconductor element, two contact locations and a vertically or horizontally patterned carrier substrate, and a method for producing a semiconductor component are disclosed for the purpose of reducing or compensating for the thermal stresses in the component. The thermal stresses arise as a result of temperature changes during processing and during operation and on account of the different expansion coefficients of the semiconductor and carrier substrate. The carrier substrate is patterned in such a way that the thermal stresses are reduced or compensated for sufficiently to ensure that the component does not fail.
REFERENCES:
patent: 4862239 (1989-08-01), Broich et al.
patent: 5903583 (1999-05-01), Ullman et al.
patent: 6335546 (2002-01-01), Tsuda et al.
patent: 6403985 (2002-06-01), Fan et al.
patent: 2001/0004534 (2001-06-01), Carter-Coman et al.
patent: 2001/0042866 (2001-11-01), Coman et al.
patent: 2001/0050376 (2001-12-01), Asami et al.
patent: 2002/0137244 (2002-09-01), Chen et al.
patent: 2003/0022465 (2003-01-01), Wachtler
patent: 2003/0183835 (2003-10-01), Yanagihara et al.
patent: 2004/0056254 (2004-03-01), Bader et al.
patent: 198 21 544 (1999-12-01), None
patent: 199 05 517 (1999-12-01), None
patent: 195 06 093 (2000-12-01), None
patent: 100 17 336 (2001-10-01), None
patent: 100 20 464 (2001-11-01), None
patent: 100 40 448 (2002-03-01), None
patent: 196 46 476 (2002-03-01), None
patent: 0 184 117 (1986-06-01), None
patent: 0 590 232 (1993-03-01), None
patent: WO 01/41225 (2001-06-01), None
patent: WO 01/61766 (2001-08-01), None
Datenblatt micro resist technology: “ma-P 100-Thick Positive Photoresist for Optical Lithography”.
W. Schmid, “Hocheffiziente Leuchtdioden mit lateralem Auskoppeltaper: Konzept, Herstellung und Eigenschaften”, VDI Verlag. Reihe 9, Nr. 347, pp. 70-75.
Datenblatt www.orioline.com: “About Oriol”, 2001, Oriol Inc., Jun. 14, 2002.
Datenblatt www.nanopierce.com: “The NanoPierce Connection System (NCS)”, Jun. 14, 2002.
MichroChem Corp.: “NANO TM SU-8 Negative Tone Photoresists Formulations 50 & 100”, www.microchem.com Rev. Jan. 2001.
Naoki Wada et al., “Stable Operation of AIGaAs/GaAs Light-Emitting Diodes Fabricated on Si Substrate” Japanese Journal of Applied Physics, vol. 31, Nr. 2A Part 2, pp. L78-L81, Feb. 1, 1992.
Wade N. et al., “GaAs/AlGaAs Light Emitters Fabricated on Undercut GaAs on Si”, Japanese Journal of Applied Physics, vol. 33, Nr. 3A, pp. 1268-1274, Mar. 1, 1994.
Olsen et al., “Calculated stresses in multilayered heteroepitaxial structures”, Journal of Applied Physics, vol. 48, Nr. 6, pp. 2543-2547.
Eisert Dominik
Illek Stefan
Schmid Wolfgang
Brewster William M.
Cohen Pontani Lieberman & Pavane LLP
Osram Opto Semiconductors GmbH
LandOfFree
Method of forming light emitting devices including forming... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming light emitting devices including forming..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming light emitting devices including forming... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3730487