Method of forming isolation region in integrated circuit semicon

Details Method of forming isolation region in integrated circuit semicon Method of forming isolation region in integrated circuit semicon

1989-01-27

1991-04-02

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 48, 437 52, 437 69, 437 70, 437 26, H01L 2176

Patent

active

050047019

ABSTRACT:
A method of manufacturing an isolation region including a field oxide layer and a channel stopper impurity region is disclosed. The channel stopper impurity region is formed after forming the field oxide layer by introducing ions of impurity at a portion of the substrate through the field oxide layer by ion-implantation manner.

REFERENCES:
patent: 4608751 (1986-09-01), McElroy
patent: 4679303 (1987-07-01), Chen et al.
patent: 4731642 (1988-03-01), Katto et al.
Nishiyama et al., JP. J. Appl. Phys. v. 19, No. 10 (Oct. 1980), pp. L563-L566.

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