Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2006-10-24
2006-10-24
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S906000, C257SE21228, C134S002000
Reexamination Certificate
active
07125784
ABSTRACT:
The present invention relates to a method for forming an isolation film in a semiconductor device. After a trench for isolation is formed, a polymer film is stripped by a post cleaning process using BFN. A pre-treatment cleaning process using only SC-1 is performed and a sidewall oxidization process is then carried out. It is therefore possible to improve fail of the roughness of the trench sidewall and to easily strip polymer. Furthermore, since a conventional PET process is omitted, an isolation film manufacturing process is simplified. It is also possible to prohibit out-diffusion of dopants injected into a semiconductor substrate through a pre-treatment cleaning process using CLN N before the sidewall oxidization process. Incidentally, by forming a slope at the top corner of the trench, it is possible to prevent a gate oxide film thinning phenomenon that the gate oxide film thinner than a desired thickness is deposited at the trench corner. It is also possible to improve electrical properties of a device since an active region as much as a target critical dimension is secured.
REFERENCES:
patent: 6034393 (2000-03-01), Sakamoto et al.
patent: 6326282 (2001-12-01), Park et al.
patent: 6759708 (2004-07-01), Hurley et al.
patent: 2001/0006246 (2001-07-01), Kwag et al.
patent: 2001/0052626 (2001-12-01), Lo
patent: 2002/0055217 (2002-05-01), Kanamori
patent: 2002/0081441 (2002-06-01), Desu et al.
patent: 2002/0102811 (2002-08-01), Farrow et al.
patent: 2002/0112740 (2002-08-01), DeYoung et al.
patent: 2004/0072431 (2004-04-01), Shin
patent: 2005/0142765 (2005-06-01), Joo
patent: 2005/0233524 (2005-10-01), Lee
patent: 2000-0027010 (2000-05-01), None
Dong Cha Deok
Han II Keoun
Fourson George
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
LandOfFree
Method of forming isolation film in semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming isolation film in semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming isolation film in semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3632366