Method of forming isolated wells in the fabrication of BiCMOS de

Fishing – trapping – and vermin destroying

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437 59, 437151, 437 63, H01L 21266

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052683125

ABSTRACT:
A junction isolated P-well is formed for high performance BiCMOS. Two dopants of opposite conductivity types are implanted and co-diffused inside an annular N-type region to form a narrow N-type buried layer positioned between two P-type regions. N-type buried layer is formed having P-type doped regions above and below the N-type buried layer so that the N-type buried layer is narrow. The P-type region above the N-type buried layer provides for a retrograde profile of the P-well formed above it. Besides the P-well isolation, the P-type region below the N-type buried layer acts as a ground plane which collects noise, which helps to prevent it from being coupled to other devices of the BiCMOS circuit.

REFERENCES:
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patent: 5001073 (1991-03-01), Huie
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patent: 5106765 (1992-04-01), Mizutani et al.
D. de Lang et al, "Integration of Vertical PNP Transistors in a Double-Polysilicon Bi-CMOS Process", Bipolar Circuits and Technology Meeting, IEEE, 1989.

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