Method of forming interconnect having stacked alignment mark

Details Method of forming interconnect having stacked alignment mark Method of forming interconnect having stacked alignment mark

2007-10-30

2007-10-30

Potter, Roy (Department: 2822)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Having substrate registration feature

C438S462000

Reexamination Certificate

active

11620057

ABSTRACT:
A first film layer is formed over a substrate. A portion of the first film layer is removed to form a first alignment mark pattern and a first conductive layer is formed to fill the first alignment mark pattern to form a first alignment mark. A second film layer is formed and a portion of the second film layer is removed to form openings and to form a second alignment mark pattern. A second conductive layer is formed to fill the openings to form first conductive wires and to fill the second alignment mark pattern to form a second alignment mark. A third film layer and a hard mask layer are formed over the second film layer and a portion of the hard mask layer and the third film layer is removed to form via openings. A third conductive layer is formed in the via openings.

REFERENCES:
patent: 5933744 (1999-08-01), Chen et al.
patent: 6420791 (2002-07-01), Huang et al.
patent: 6617669 (2003-09-01), Saito

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