Method of forming integrated current-limiter device for power MO

Details Method of forming integrated current-limiter device for power MO Method of forming integrated current-limiter device for power MO

1995-06-01

1996-12-17

Fourson, George

Fishing, trapping, and vermin destroying

437 6, 437 28, 437 32, 437911, 148DIG10, 148DIG11, 148DIG126, H01L 21265

Patent

active

055852874

ABSTRACT:
A bipolar control transistor, forming part of an integrated current-limiter device comprises inside an epitaxial layer superimposed over a semiconductor substrate of a first type of conductivity, a base region of a second type of conductivity accessible from a base contact and regions of collector and emitter of the first type of conductivity contained in the base region and accessible from respective collector and emitter contacts. The base region comprises at least one highly-doped deep-body region which contains almost completely said emitter region, a lightly-doped body region which contains the collector region and an intermediate-doped region which co-operates with the first deep-body region to completely contain the emitter region and a surface area of the base region that is included between the regions of collector and emitter. There is also at least one first portion of a layer of polysilicon superimposed and self-aligned with the surface area between the regions of collector and emitter and electrically connected to the collector contact of the bipolar transistor.

REFERENCES:
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patent: 4902640 (1990-02-01), Sachitano et al.
patent: 5204541 (1993-04-01), Smayling et al.
patent: 5221850 (1993-06-01), Sakurai
patent: 5422509 (1995-06-01), Zambrano
Materials Science and Engineering B, vol. B2, No. 1-3, Feb. 1989, J. Middlehoek, "High Energy Implanted Transistor Fabrication".
Neues aus der Technik, No. 3. 15 Aug. 1986, Wurzburg, Deutschland, p. 1, "Lateraler Hochspannumgstransistor".

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