Method of forming integrated circuit devices

Details Method of forming integrated circuit devices Method of forming integrated circuit devices

1991-09-18

1993-08-31

Arbes, Carl J.

Metal working

Method of mechanical manufacture

Electrical device making

29832, 437 8, H05K 334

Patent

active

052397475

ABSTRACT:
A plurality of integrated circuit devices are bonded to a substrate. Signal traces for corresponding pins of the devices are run to the same location, but are not electrically connected. They are, however, located in close physical proximity at a designated location. At this designated location, a properly shaped and sized contact can be used to contact all of the corresponding traces simultaneously, allowing parallel burn-in of all devices on the substrate to be performed. The devices can still be tested individually after burn-in. Once functionality of the overall subsystem has been confirmed and encapsulation completed, a permanent contact can be made at the designated location to all traces simultaneously so that the devices will be in parallel, and the substrate can be encapsulated to form a completed subsystem.

REFERENCES:
patent: 3606679 (1971-09-01), Schroeder
patent: 3702025 (1972-11-01), Archer
patent: 3835530 (1974-09-01), Kilby
patent: 3993934 (1976-11-01), Baker et al.
patent: 4866508 (1989-09-01), Eichelberger et al.
patent: 4924589 (1990-05-01), Leedy
patent: 5020219 (1991-06-01), Leedy

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