Method of forming insulated gate field-effect transistors

Details Method of forming insulated gate field-effect transistors Method of forming insulated gate field-effect transistors

1992-07-16

1994-01-04

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 44, 437 45, 437 46, 437 52, 148DIG82, H01L 2100

Patent

active

052759610

ABSTRACT:
An insulated-gate field-effect transistor (426, 452) has reduced gate oxide stress. According to one embodiment, the control gate (458) has a doped region (460) adjacent the source end of the transistor (452), and an undoped dielectric portion (462) adjacent the gate end. According to another embodiment, the drain end of the conductive gate (434) is disposed on top of a thick insulator region (432) that also acts to mitigate the high electric fields present when the transistor is subjected to a high voltage transient.

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