Method of forming highly-integrated thin film capacitor with hig

Details Method of forming highly-integrated thin film capacitor with hig Method of forming highly-integrated thin film capacitor with hig

1997-09-09

1999-08-24

Tsai, Jey

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

438240, H01L 218242

Patent

active

059435470

ABSTRACT:
In a capacitor including a silicon substrate and an insulating layer formed on the silicon substrate having a contact hole, a lower electrode layer including a silicon diffusion preventing conductive layer and an oxidation resistance conductive layer, an upper electrode layer, and a high dielectric constant layer therebetween, the silicon diffusion preventing layer is located on or within the contact hole and is isolated from the high dielectric constant layer. The high dielectric constant layer is formed on an upper surface and a side surface of the oxidation resistance conductive layer.

REFERENCES:
patent: 5382817 (1995-01-01), Kashihara et al.
patent: 5466964 (1995-11-01), Sakao et al.
patent: 5567636 (1996-10-01), Jones, Jr.
patent: 5580814 (1996-12-01), Larson
P.Y. Lesaicherre Et AL., "A Gbit-scale DRAM stacked capacitor technology with ECR MOCVD SrTiO.sub.3 and RIE patterned RuO.sub.2 /TiN storage nodes", pp. 34.1.1-34.1.4, San Francisco USA.

Affiliated with

Also associated with

Rating

Method of forming highly-integrated thin film capacitor with hig does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming highly-integrated thin film capacitor with hig, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming highly-integrated thin film capacitor with hig will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-475972