Fishing – trapping – and vermin destroying
Patent
1994-08-29
1995-02-28
Thomas, Tom
Fishing, trapping, and vermin destroying
437 43, 437239, 148DIG24, H01L 21266
Patent
active
053936868
ABSTRACT:
A new method of forming a high quality silicon oxide under a gate electrode for an integrated circuit is described. A gate silicon oxide layer is formed for the gate electrode. A blockout mask is provided for all areas of the integrated circuit not requiring an ion implant. The ion implant is implanted through the gate silicon oxide layer into those areas not covered by the blockout mask. The blockout mask is removed. The gate silicon oxide layer is cleaned to improve the electrical breakdown and charge breakdown characteristics to the state they were before the mask and ion implanting steps by a) treating the gate silicon oxide layer with ammonia and peroxide fluid in the concentration NH.sub.4 OH:H.sub.2 O.sub.2 :H.sub.2 O=(0.4-1):1:5.5 for between about 3 to 7 minutes at a temperature of between about 60.degree. to 80.degree. C. and b) subjecting the gate silicon oxide layer to an atmosphere of C.sub.2 H.sub.2 Cl.sub.2 and excess oxygen at a temperature of between about 775.degree. to 875.degree. C. for a time of between about 5 to 25 minutes. A polysilicon layer is deposited over the gate silicon oxide layer and patterned to form the gate electrode.
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patent: 5210056 (1993-05-01), Pong et al.
patent: 5225355 (1993-07-01), Sugino et al.
patent: 5229334 (1993-07-01), Kato
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patent: 5316981 (1994-05-01), Gardner et al.
Chiang A. M.
Shiao J. S.
Yeh Wei-kun
Chaudhari Chandra
Saile George O.
Taiwan Semiconductor Manufacturing Company
Thomas Tom
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