Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Including adhesive bonding step
Reexamination Certificate
1999-03-25
2001-11-13
Christianson, Keith (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Including adhesive bonding step
Reexamination Certificate
active
06316289
ABSTRACT:
The present invention relates to fine pitch interconnections and, in particular, to a method for forming fine pitch interconnections and to a standoff mask employed therein.
Flip chip semiconductor devices and other leadless electronic components that require fine-pitch interconnections (the “pitch” being the center-to-center spacing of adjacent contacts and/or connections) are becoming more and more important for the more advanced electronic devices because the reduction in physical size that they afford can accommodate the ever-increasing need for more input and output connections and increasing operating frequencies utilized in modern computers and communication equipment. Thus, the ability to deposit interconnection materials such as solder pastes and conductive adhesives at decreasing pitch is becoming more and more desirable.
Stenciling and screening techniques have been employed for depositing solder pastes and conductive polymers have been around and used for more than 60 years, as exemplified by U.S. Pat. No. 2,014,524 issued to Franz in 1935. The same basic technique has recently been extended to high precision deposition by employing photo-etching and laser-cutting techniques for forming very small openings in stencils.
The use of stenciling and screening techniques for depositing solder pastes is discussed by Speckled et al. in “Soldering Techniques for Surface Mounted Leadless Chip Carrier”, published in
Proceedings of the International Symposium on Microelectronics
, October 1986, pages 902-913, and for depositing conductive adhesives is disclosed by Kulesza and Estes in U.S. Pat. No. 5,074,947, entitled “Flip Chip Technology Using Electrically Conductive Polymers and Dielectrics,” U.S. Pat. No. 5,196,371, entitled “Flip Chip Bonding Method Using Electrically Conductive Polymer Bumps,” U.S. Pat. No. 5,237,130, entitled “Flip Chip Technology Using electrically Conductive Polymers and Dielectrics,” and U.S. Pat. No. 5,611,140, entitled “Method of Forming Electrically Conductive Polymer Interconnects on Electrical; Substrates,” and is reviewed by Gilleo in “Direct Chip Interconnection Using Polymer Bonding”, 39
th Electronic Component Conference
, May 1989, pages 37-44.
Each deposit of interconnection material, be it a solder paste or a conductive polymer adhesive, and be it wet as deposited or dried, is often referred to as a “bump” as in, for example, a “solder bump” or an “adhesive bump.”
While some experiments may have employed stenciling and screening techniques to deposit materials with spacing in the range of 50 microns, in actual practice it has been difficult to consistently achieve a pitch of about 100 microns. More importantly, when contact pad size is small so that the size of the material bump deposited on the contact pads and the stencil openings through which it is deposited are correspondingly small, the thickness of the stencil or mask must be even thinner so as to avoid the deposited material remaining in the stencil openings rather than adhering to the contact pads. For example, if the stencil openings are 75 microns, the stencil thickness must be substantially thinner than 75 microns so that the surface area on the substrate in contact with the deposited material is larger than the surface area of the tubular opening in the stencil, and the material will adhere to the contact pads on the substrate rather than to the stencil. Typically, the thickness of the stencil is kept at about one-half the diameter of the smallest stencil openings, but thin stencils for forming fine features, e.g., less than 100 microns, are undesirably fragile and easily torn.
In direct contact deposition as is employed in most of the stenciling methods, the wet thickness of the deposited material will be about the same as the stencil thickness. Thus, if the stencil is only 50 microns thick, the deposited conductive paste will be about 50 microns thick when wet and typically will be substantially thinner when dried, as by solvent removal, to become dry bumps on the contact pads. For example to deposit 75 micron bumps on contact pads at a 150-micron pitch using a 50-micron thick stencil, the 50-micron thick wet conductive paste will dry to a finished thickness (or feature height) that may be as thin as 25-35 microns. This thickness or height is too little to form interconnections between an electronic component and the substrate, even with a flexible conductive adhesive interconnection material, that will withstand the internal stress induced by the differences in thermal expansion of the electronic component and the substrate that are bonded together to form a functional electronic device. In fact, in the case of solder paste and higher-strength conductive adhesive interconnections, this thickness will not allow the use of an adhesive underfill that is necessary to withstand such induced stress, and is thus basically unusable.
U.S. Pat. No. 5,046,415 to Oates entitled “Composite Stencil For Screen Printing” describes a composite stencil that includes a layer of metallic material such as brass and a layer of flexible material bonded to the metallic layer to form a seal for the screen printing of solder paste. Two problems of the Oates composite stencil are that the stencil is too thick to be employed to form very fine features, i.e. if made thin enough it would likely tear, and that the wet paste can adhere to either the metallic layer or the flexible layer of the stencil, or both, and thus remain in the openings in the stencil. The flexible layer of Oates is used to provide a seal or dam for the solder paste, and there is no suggestion as to how to form fine features, or of how to solve the problems of stencil tearing or of paste adhering to the stencil. Moreover, likely smearing of the deposited wet paste when the Oates stencil is removed renders the Oates stencil unsuitable for depositing very fine bumps, for example, of solder paste.
Certain commercial laminated stencils are made up of two or three separate metal foils of brass or stainless steel bonded together to form a single stencil of varying thickness, and are intended to be used to print two or three different solder thicknesses in a single pass. To do this, the side of the stencil being the foil with the smallest openings must be against the object onto which the solder is to be deposited and the solder must be applied onto the side of the stencil being foils, if any, having larger openings. Claims regarding such stencils that “clearances as small as 0.020″ between components are workable” do not provide for the fine feature sizes (e.g., 25-50 microns) and fine pitches (e.g., 100-200 microns) required by modern semiconductor devices and electronic circuits. (Note that 0.020 inches=20 mils=500 microns).
One of the most difficult aspects of depositing adhesive paste onto a semiconductor wafer is the fact that extremely small amounts of adhesive paste must be deposited onto a multiplicity of very small, e.g., 50-100 microns, contact pads that are situated on a large circular wafer structure, e.g., 6 inches or more in diameter. Alignment of such masks and wafers can generally be achieved only with high precision equipment and a relatively expensive process.
Accordingly, there is a need for an accurate, repeatable and low cost method of depositing conductive pastes at very fine feature sizes. It is desirable that such very fine features could be deposited onto large-area substrates, such as a 6″ or 8″ diameter semiconductor wafer or a large (perhaps 18 inches or larger) printed wiring circuit board, including the accurate alignment and holding of the stencil or mask in position with respect to the substrate.
To this end, the method of the present invention for forming a pattern of adhesive on a substrate comprises:
obtaining a substrate having a pattern of sites thereon on which adhesive is to be deposited;
obtaining a standoff mask including a metal sheet having a pattern of openings corresponding to the pattern of sites and having standoff features thereon spaced away laterally from
Amerasia International Technology Inc.
Christianson Keith
Dann Dorfman Herrell and Skillman, P.C.
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