Method of forming fin transistor

Details Method of forming fin transistor Method of forming fin transistor

2006-11-08

2010-02-02

Fulk, Steven J (Department: 2891)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S296000, C257S506000, C257SE21546

Reexamination Certificate

active

07655534

ABSTRACT:
A fin transistor is formed by forming a hard mask layer on a substrate having an active region and a field region. The hard mask layer is etched to expose the field region. A trench is formed by etching the exposed field region. The trench is filled with an SOG layer. The hard mask layer is removed to expose the active region. An epi-silicon layer is formed on the exposed active region. The SOG layer is then partially etched from the upper end of the trench, thus filling a lower portion of the trench. A HDP oxide layer is deposited on the etched SOG layer filling the trench, thereby forming a field oxide layer composed of the SOG layer and the HDP oxide. The HDP oxide layer in the field oxide layer is etched to expose both side surfaces of the epi-silicon layer. A gate is then formed on the epi-silicon layer of which both side surfaces are exposed and the field oxide layer.

REFERENCES:
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patent: 2002/0127817 (2002-09-01), Heo et al.
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patent: 2005/0170604 (2005-08-01), Orlowski et al.
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patent: 10-2005-0011952 (2005-01-01), None
Korean Patent Gazette, May 7, 2007.

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