Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1982-09-16
1984-07-31
Roy, Upendra
Metal working
Method of mechanical manufacture
Assembling or joining
29577C, 148 15, 148187, 357 91, 427 531, H01L 21263, H01L 2126
Patent
active
044621507
ABSTRACT:
A method of manufacturing semiconductor devices is disclosed. In the method, a redundancy circuit is formed by forming circuit elements making up an integrated circuit on a semiconductor substrate and a spare element connected to the circuit element through an electrically non-active region. Then, an impurity region is formed in the non-active region by introducing impurity and is electrically selectively activated with laser irradiation, whereby the circuit elements and the spare element are interconnected electrically.
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patent: 4339285 (1982-07-01), Pankove
patent: 4351674 (1982-09-01), Yoshida et al.
patent: 4377421 (1983-03-01), Wada et al.
patent: 4381201 (1983-04-01), Sakurai
Osamu Minato et al., "HI-CMOSII 4K Static RAM", IEEE Solid-State Circuits Conference, Feb. 18, 1981, pp. 14-15.
Nishimura Hidetaro
Nozawa Hiroshi
Roy Upendra
Tokyo Shibaura Denki Kabushiki Kaisha
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