Chemistry: electrical and wave energy – Processes and products
Patent
1981-01-24
1982-11-09
Tufariello, T.
Chemistry: electrical and wave energy
Processes and products
204 38B, 204297M, C25D 500, C25D 1718
Patent
active
043583490
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
This invention relates to methods of forming electrically conductive wiring paths on insulative substrates and, more particularly, to a method of forming the electrical wiring paths on the insulative substrate by means of an electroplating for interconnecting electronic circuit components disposed on a single substrate.
BACKGROUND OF THE INVENTION
As a general one of conventional methods of the kind referred to, there has been known a method of forming the electrical wiring paths by performing, for example, an etching, leaving necessary portions of a copper foil surface of a copperclad laminate in which a copper foil is adhered over the entire surface of one or both sides. According to this method, however, there has been a problem that the same is uneconomical and wasting of resources since portions other than the electrical wiring paths of the copper foil are removed by a chemical liquid of ferric chloride or the like.
As a solution to this problem, it is sufficient to have a conductive metal material adhered only to those portions on the insulative substrate where the electrical wiring paths are to be formed, and many methods for this purpose have been suggested. In these methods, the portions on the insulative substrate other than the electrical-wiring-path forming portions are masked so that only the necessary portions will have the conductive metal material adhered thereto and, for this masking, it has been practiced to paint or print a masking material onto the insulative substrate or to adhere such a soft packing material as silicone rubber.
However, in the method using the foregoing masking material, steps of painting or printing the masking material and of removing the same are required, and problems are involved not only in the time required therefor, but also in the complicacy of the steps. In the method in which the packing material is used, further, it involves a difficulty in maintaining the precision in the positioning and cannot be employed for forming the electrical paths of complex electronic circuit. Furthermore, when considerations are given to anti-corrosion plating, solder plating, and thick plating to be performed selectively with respect to the formed electrical wiring paths, there has been a problem that, with the foregoing method, further complicated steps are required, and production time is rendered prolonged.
A primary object of the present invention is to provide a method of forming the electrical wiring paths on the insulative substrate which is capable of forming only a pattern of the electrical wiring paths, permitting the saving of copper or the like metallic material and, in addition, allowing the electrical wiring paths to be formed easily and highly efficiently on the insulative substrate. Another object of the present invention is to provide a method for forming electrical wiring paths on an insulative substrate in which a second plated layer can be easily formed on a plated layer formed on the insulative substrate, and which facilitates a selective anti-corrosion plating at portions specifically requiring corrosion resistivity in the electrical wiring paths formed on the insulative substrate, a selective solder plating at portions specifically requiring the solder plating within the electrical wiring paths or, further, a selective thick plating at portions specifically requiring a large capacity electric current flow in the electrical wiring paths.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a vertically sectioned view of the insulative substrate 1 of the present invention on which the extremely thin conductive metal layer 2 is formed,
FIG. 2 is a perspective view of the mask member in FIG. 1,
FIG. 3 is a sectioned view showing another embodiment of the mask member of the present invention,
FIG. 4(a) is a schematic view of the second step of the present invention,
FIGS. 4(b) and (c) are perspective views of the electromagnets,
FIGS. 5 and 6 are schematic views showing other embodiments of the second step in the present invention,
FIG. 7
REFERENCES:
patent: 3274092 (1966-09-01), Marantz
patent: 3306830 (1967-02-01), Bittrich
patent: 3582477 (1971-06-01), Gelb
patent: 3763027 (1973-10-01), Pearson
patent: 4264416 (1981-04-01), Noz
Kazuyoshi Honda
Masami Takagi
Shunichi Nakayama
Matsushita Electric & Works Ltd.
Tufariello T.
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