Method of forming dual damascene structures

Details Method of forming dual damascene structures Method of forming dual damascene structures

1999-07-23

2000-11-14

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

H01L 21302

Patent

active

061470058

ABSTRACT:
A method for forming the dual damascene structure over a semiconductor substrate is disclosed in the present invention. First, a first dielectric layer is formed on the semiconductor substrate. An etch stopping layer is formed on the first dielectric layer. And a second dielectric layer is formed on the etch stopping layer. The second dielectric layer is then etched till the etch stopping layer to form a first opening and a second opening on the second dielectric layer. It is noted that the size of the second opening is bigger than that of the first opening. A polymer layer is next formed on the second dielectric layer and the etch stopping layer to close the first opening and to fill into a portion of the second opening for defining a third opening in the second opening. The polymer layer formed on the bottom of the third opening, the etch stopping layer and the first dielectric layer are etched in sequence, by using the polymer layer formed on the sidewalls of the second opening to serve as an etching mask, to expose a surface of the semiconductor substrate for defining the third opening on the first dielectric layer. After the polymer layer is removed, a conducting layer is fill into the first opening, the second opening and the third opening.

REFERENCES:
patent: 5705430 (1998-01-01), Avanzino et al.
patent: 5990015 (1999-11-01), Lin et al.
patent: 6001414 (1999-12-01), Huang et al.
patent: 6025276 (2000-02-01), Donohoe

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