Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to nonconductive state
Reexamination Certificate
2005-11-09
2008-08-19
Huynh, Andy (Department: 2818)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to nonconductive state
C438S215000, C438S281000, C438S333000, C438S467000, C438S601000, C257S529000, C257S665000
Reexamination Certificate
active
07413936
ABSTRACT:
A programmable package with a fuse embedded therein, and fabrication method are provided. The fuse has first and second terminal ends joined by a central portion defining a fusible link. The ends include a portion of the first and second conductive layers, the central portion including a portion of the first conductive layer. The first layer may be electroless copper and the second layer may be electrolytic copper. The fuse may have a dog-bone or a bow tie shape. The method includes providing a substrate with a dielectric layer, and forming the fuse by depositing first conductive layer, forming and patterning second conductive layer over a portion of the first layer, and patterning first layer to form interconnects between areas of the second layer.
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Azimi Hamid
Gupta Debabrata
Witharana Saliya
Huynh Andy
Intel Corporation
Schwegman Lundberg & Woessner, P.A.
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